Social networking, machine learning, and big data analytics demand ever-increasing network connectivity. RANOVUS, with operations in Ottawa, Canada, Nuremberg, Germany, and San Jose, USA, is a solution provider for the next generation data center infrastructures. We aim to deliver advanced technology that minimizes environmental impact through lower power dissipation. Working with world class fabrication partners, RANOVUS is the leader in the application of unique new technologies to fiber-optic communications products for data centers. We are seeking a motivated and talented Senior Analog Layout Engineer to join our Mixed Signal IC & ASIC Integration team. As a successful candidate, you will work out of our Nuremberg office with a team responsible for the development of advanced mixed-signal, analog, and RF SoC functions. These SoC functions include classical RF analog circuits as well as low-speed ADCs, DACs, and other proprietary mixed-signal circuits. Responsibilities include: • Collaborate with the design team and work in close cooperation with other team members in charge of the layout of high-speed analog and RF circuits. • The candidate will take up a leading role in the floor planning on optimization of custom RF macros and building blocks on the chip. • The successful candidate will work closely with the RF designers. He/she will consider the constraints from the designer and will go through iterations with the designer to further optimize the layout from a performance and area perspective. • The layout engineer should have a good understanding of the different circuit topologies and their constraints for the layout implementation. Good understanding of the layout rules enables to optimize the implementation. • The layout engineer is also capable to perform extraction of parasitics and make the interpretation of these results in view of further optimization. Requirements: • Master’s degree and/or B.Sc. Preferred in Electrical Engineering • 3 years’ experience in analog & mixed-signal IC layout design • Proficient in Layout related tools (Cadence, Siemens, (Mentor) • Work experience in Nanometer RF CMOS and /or RF SOI technology • Experience with RFIC layout (50GHz range) in CMOS technology • Extensive experience with Cadence OA VirtuosoXL • Strong team player who enjoys a multicultural & international environment • Candidate who is motivated and willing to develop and learn • Someone who is flexible, adaptive and can work independently • Fluency in English language written and verbal communication skills