About the Role You are responsible to design ultra-low power analog IC periphery blocks for our in-memory computing product. You will involve the design process from the system level decisions to post-layout floor-planning. You will have chance to “invent” new blocks and contribute the patent portfolio of SEMRON. What you will do: Determining the specifications of the analog blocks Design & implement ultra-low power analog IC periphery blocks such as: ADC, DAC, LDO, BG Reference, Level-shifters … Contribute the layout floor-plan Post-layout characterization Developing the verification scheme for analog blocks as well as mixed-signal systems from analog perspective What you should bring in: Extensive knowledge in analog design in theory and having hands-on experience in at least two of the following: Data converters, Read-out circuits Data transfer Power management Memory periphery DC-DC conversion At least two successful tape-out Experience in chip measurement Helpful but not required: Having the experience in chip ownership Project management experience About us SEMRON develops a 3D scaled AI inference chip, incorporating GPT-3.5-like models on a square cm silicon with minimal power consumption. This revolutionary CMOS-compatible semiconductor technology enables running generative AI at the edge, making it possible for wearable tech, smartphones, and beyond. With a trend towards large foundation models, SEMRON can serve multiple markets with minimal adjustments and simplify the software stack.